Nvidia Positions NVLink as the Platform for Custom AI Chips

Nvidia’s $3.5 billion investment in MediaTek is tied to a broader engineering arrangement: the companies say MediaTek’s specialized AI accelerators can be connected to Nvidia’s NVLink-based data-center architecture, rather than being deployed as an entirely separate system.

Jensen Huang described the announcement as an expansion of an existing partnership built around MediaTek system-on-chips, or SoCs. Nvidia had integrated its NVLink chip-to-chip interface with MediaTek’s SoCs, Huang said, so a MediaTek processor could connect directly to an Nvidia GPU. That work produced DGX Spark, a compact system Huang said delivers one petaflop of performance and can run advanced agentic AI locally rather than in the cloud.

The companies plan to carry that work through multiple product generations. Huang said the processor architecture will underpin DGX Spark and RTX Spark systems for PCs, as well as a forthcoming Microsoft-and-Nvidia Windows PC designed for “the age of agents.” Nvidia’s GPU is paired die-to-die with MediaTek’s SoC; Huang presented the work as a major commitment to the PC industry rather than a one-off device program.

The larger intended application is the data center. MediaTek builds XPUs—specialized accelerators—and Nvidia plans to connect them through NVLink Fusion to its scale-up NVLink systems, Spectrum-X switching, and other AI-factory infrastructure. Huang’s pitch was that customers using a MediaTek XPU could attach it to a Nvidia-based data center more seamlessly, while a MediaTek project could also create demand for Nvidia networking.

“When they win, we have an opportunity to sell a lot more,” Huang said. “When we win, they have an opportunity to sell a lot more.”

Neither executive named a deployment or customer win during the interview. What they described was a multigeneration engineering alignment intended to make MediaTek’s XPU offerings compatible with Nvidia’s infrastructure and to give Nvidia a role in systems that incorporate them.

For Rick Tsai, the value of the arrangement is the ability to offer customers speed and flexibility across AI-computing deployments with different requirements.

Tsai placed MediaTek’s ambitions across the stack: hyperscalers developing ASICs, enterprise data centers and “neo clouds,” and desktop AI systems. Combining MediaTek’s XPU capability with Nvidia’s NVLink Fusion, he said, should help customers build and scale data centers quickly while retaining differentiated silicon in their own offerings.

The immediate work remains underway. Tsai said MediaTek was only beginning to build Nvidia’s latest NVLink version into the chassis Huang described, and said the commercial effect would take time. The value proposition, in his account, is faster time to market for customers that want specialized compute but need an integrated system around it.

“The important thing for this era of AI is, it’s incredibly fast changing,” Tsai said.

MediaTek had said its AI-chip business would be about $2 billion this year and could reach roughly 15% of an $80 billion addressable market next year. Asked whether the Nvidia arrangement could accelerate that growth, Tsai said MediaTek expected it to help, though only after the NVLink-enabled chassis work advances.

He declined to name a specific ASIC customer as a case study, but said MediaTek was engaging some customers jointly with Nvidia. The announcement, he argued, should reinforce those customers’ confidence in the relationship and in the NVLink Fusion business model. Some customers, Tsai said, may need smaller amounts of computing power but still want differentiation in their own products; the combined offering is meant to improve their go-to-market capability.

Huang said the structure was driven by customer requests. Building an XPU is “very, very hard,” he said, and MediaTek can help customers build those chips. Nvidia’s contribution is the platform around an accelerator: CPUs, switching, and several forms of networking used in an AI factory.

Custom silicon can take workloads that might otherwise run on a general-purpose GPU. Jensen Huang’s answer was that XPUs are already in the market—and that their presence does not, in his view, remove Nvidia from the rest of the data-center system.

An XPU, Huang said, is a specialized chip. He contrasted it with Nvidia’s GPU, which he described as a general-purpose accelerator for the full AI lifecycle, from data processing and pre-training through post-training and agentic-AI inference. He said Nvidia supports closed and open models, including video, language, biology, physics, and robotics models, across cloud, on-premises, and edge environments. Huang argued that this breadth makes Nvidia’s infrastructure especially fungible, durable, and rentable.

But the central commercial point was not that custom chips will disappear. Huang said customers that want specialized accelerators still need networking, switching, CPUs, and a system architecture that lets those elements operate together. Nvidia’s stated aim for NVLink Fusion is to make its infrastructure the platform into which those chips are integrated.

“It’s not a question about if one or the other,” Huang said.

Huang said Nvidia is not intimidated by XPUs; it is “welcoming it” and opening its platform so custom accelerators can connect to Nvidia infrastructure. He said Nvidia was already present in every cloud and expected to remain in every cloud and AI factory, with some racks augmented by specialized accelerators.

He framed the stakes in terms of Nvidia’s expanding content per gigawatt of AI-factory capacity. Hopper represented about $18 billion in Nvidia economics per gigawatt, he said; Grace Blackwell about $25 billion; and the Vera Rubin generation more than $40 billion. Huang attributed the increase to Nvidia’s expansion beyond the GPU into multiple chip types, switching, and networking.

In Huang’s formulation, an XPU would replace one component of the factory rather than the whole system. For MediaTek, the proposed arrangement would mean offering an XPU alongside a more complete set of system capabilities, rather than asking a customer to separately address NVLink switching, network interfaces, Ethernet switching, and the different ways a data center must scale.

Ed Ludlow asked whether Nvidia’s purchase of MediaTek convertible bonds amounted to circular financing. Jensen Huang rejected that characterization, saying the companies run their own businesses and that MediaTek was already profitable and successful before Nvidia’s investment.

Huang described MediaTek as one of Nvidia’s largest partnerships and said the investment formalizes a multigeneration engineering commitment spanning edge AI, PC chips, and AI factories. He called it “a massive engineering alignment” and said the roadmap being executed was measured in a decade, not one or two years.

Nvidia’s stated rationale was confidence in the collaboration. Huang said he had known Tsai for 25 years and described their relationship as grounded in trust. He said he expected the investment to generate “incredible returns,” presenting that as his expectation from the long-term partnership rather than as an assured outcome.

Tsai said MediaTek had been unable to discuss the strategic-investment portion when it disclosed a $5 billion dollar-bond program in late July. The proceeds, he said, would have multiple uses, including supply-chain support and further investment in technology: MediaTek’s ASIC-design and manufacturing capabilities, interconnect intellectual property, and advanced packaging.

The expanded collaboration agreements with Nvidia, Tsai said, are the key element. The proceeds are intended to help make those agreements happen “better and further.”

The partnership also reaches into the supply constraints surrounding AI infrastructure, particularly memory and advanced packaging.

Rick Tsai said MediaTek faces challenges not only in high-bandwidth memory, or HBM, but further down the supply chain in substrates and related components. Taiwan’s position near the center of the AI-infrastructure ecosystem helps, he said, as does MediaTek’s work with Nvidia and customers. Conditions remain difficult, he said, though he sees “blue skies” ahead.

Jensen Huang said the arrangement expands both companies’ supply chains: Nvidia’s networking ecosystem becomes part of MediaTek’s supply chain, while MediaTek’s XPU becomes part of Nvidia’s. The intended result, he said, is to aggregate supply chains around a more standardized system design.

Nvidia’s next-generation HBM, which Huang called NVHBM, uses a custom Nvidia base layer beneath the memory stacks. Nvidia has extended that base-layer technology to NVLink Fusion partners, including MediaTek and Amazon, Huang said. The HBM stacks must be integrated with an XPU die in a CoWoS package, a combination he described as highly complex.

By extending that technology to partners, Huang said, they can benefit from Nvidia’s large installed base and supply chain, while Nvidia can benefit from theirs. The alliance therefore reaches beyond an interconnect between chips: it is intended to connect custom-accelerator design with memory, packaging, networking, and data-center deployment.